In standard semiconductor processes, etching and ion implantation typically include the use of photo-resist layers having a thickness of about 2 μm or less. In contrast, photo-resist layers having substantially greater thicknesses within a range of about 25 μm to 300 μm are needed for processing of microelectromechanical systems (MEMS), copper pillars and bumps for example. Such thick photo-resist layer processing presents challenges not only with respect to manufacturing, but also with respect to metrology necessary for process control of critical dimensions (CD) and mask alignment (also known as overlay measurements). The critical dimensions may be small features such as a small line or a set of lines that are intended to be generated in the photo-resist layer. After development of the photo-resist layer, the small features are measured to evaluate the fidelity of the processes. Mask alignment involves evaluating features generated in a previous step or layer, and features generated in a subsequent photo-resist layer for example, to validate alignment of the corresponding masks used to form the respective layers.
In order to control the photolithographic processes, specially designed features called process control monitors (PCMs) are used. The PCMs are embedded in the semiconductor processes used to build a structure. The metrology to control photo-resist processing steps is typically based on optical techniques such as imaging, which relies on contrast to distinguish features. However, when thick photo-resist layers are used during processing, the semi-transparent nature of the photo-resist makes it difficult to distinguish contrast between features in different layers. In addition, the substantially thick photo-resist layers make image focusing problematic, especially at high magnifications.
What is needed therefore is a process control monitor and technique for thick photo-resist photolithographic processes that improves contrast between imaged features.